Ćuk Converter

Why a converter where the inductor isn't the energy bucket

Every other single-switch DC-DC converter you have ever met — buck, boost, buck-boost, flyback, SEPIC — passes its energy across the topology through an inductor. The switch charges the inductor; the diode (or synchronous FET) lets it discharge into the load. The inductor's stored energy is the bucket; the switch is what flips the bucket on and off; and at least one port — input, output, or both — sees the chopped switch current as ripple.

The Ćuk converter rearranges those pieces so that a capacitor sits in the middle of the power path instead. The capacitor, charged to a steady-state voltage equal to V_in + |V_out|, swaps charge back and forth between the two halves of the converter as the switch toggles. The two inductors — one on the input side, one on the output side — stay continuously magnetised in steady state; their job is not to store energy but to maintain a steady current at each port.

The pay-off is that both the input current and the output current are continuous in steady state. Ripple amplitude is set by the inductor values and the switching frequency, the way it is in a buck for its output or a boost for its input, but applied simultaneously to both sides. EMI filters shrink, ceramic bulk caps shrink, sensor noise drops. The price is component count: two inductors, two capacitors, plus the switch and diode.

The four-component-plus-switch topology

The skeleton circuit:

      L1            C1            L2
V_in ──UUUU──┬──══════════──┬──UUUU──┬──── V_out (negative)
             │              │        │
             ▽ SW         ▽ D       ═ C2  ⏚ load
             │              │        │
             └──────────────┴────────┴──── GND

   L1 = input inductor (carries continuous input current)
   C1 = energy-transfer capacitor (the bucket)
   L2 = output inductor (carries continuous output current)
   C2 = output capacitor (smooths V_out)
   SW = main switch
   D  = freewheel diode

The switch SW sits between the L1/C1 node and ground. The diode D sits between the C1/L2 node and ground. They are complementary — when SW conducts, D is reverse-biased; when SW opens, D forward-biases to keep both inductor currents flowing.

The two phases of every switching cycle

Switch closed (on-time, fraction D). SW pulls the L1/C1 node to ground. V_in is now dropped entirely across L1, so its current ramps up at dI_L1/dt = V_in / L1 — energy enters from the source. On the right-hand side, C1 (charged to V_C1 ≈ V_in + |V_out|) now sits with one plate at ground (through SW) and the other plate driving the L2/C2 node. That node goes negative; the diode D is reverse-biased, and C1 discharges through L2 into the output capacitor and load. L2 current ramps up — energy leaves C1.

Switch open (off-time, fraction 1 − D). SW opens. L1 refuses to let its current change abruptly, so its switch-side end flies positive until D forward-biases. Now L1 charges C1 through D (current flows into the positive plate of C1); the input inductor is recharging the transfer capacitor. On the right-hand side, L2 also refuses to let its current change, so it freewheels through D and the load, draining whatever was deposited in the previous half-cycle. L2 current ramps down — energy now flows from the inductor field into the load.

The trick is that in steady state, the average charge entering C1 during the off-time exactly equals the average charge leaving it during the on-time. C1 sits at a constant DC voltage and merely commutates the same charge across the topology each cycle. Both L1 and L2 maintain their averages; both currents stay above zero in CCM.

The voltage-transfer relation

Applying volt-second balance to L1 and L2 in steady state — both inductors must have zero net volt-seconds per cycle — gives two equations:

L1:   V_in · D  −  (V_C1 − V_in) · (1 − D)  =  0
L2:   (V_C1 + V_out) · D  +  V_out · (1 − D)  =  0
                  (V_out is negative; signs follow ground convention)

Solving simultaneously:
      V_C1   =  V_in / (1 − D)
      V_out  =  −V_in · D / (1 − D)

The output magnitude is the buck-boost relation; the minus sign reflects the inverted polarity. A 50 % duty cycle gives V_out = −V_in; 75 % gives V_out = −3·V_in; 25 % gives V_out = −V_in/3. The capacitor C1 in steady state sits at V_in + |V_out|, which is what its voltage rating must accommodate plus a comfortable margin.

Worked example: 12 V → −5 V at 1 A telecom rail

Design a Ćuk converter for an embedded telecom board that needs −5 V at 1 A from a 12 V bus, switching at 250 kHz with Δi_L = 25 % of average inductor current on both inductors.

Duty cycle. From V_out = -V_in · D/(1-D): solving for D, D / (1 − D) = 5 / 12, so D = 5 / 17 ≈ 0.294, or 29.4 %.

Transfer capacitor voltage. V_C1 = V_in / (1 − D) = 12 / 0.706 ≈ 17.0 V. Pick a 25 V or 35 V rated low-ESR ceramic — the AC ripple-current rating must handle I_out / (1 − D) ≈ 1.4 A RMS.

Inductor currents (CCM). Average L1 current = I_in = P_out / (η · V_in) ≈ 5 / (0.9 · 12) ≈ 0.46 A. Average L2 current = I_out = 1.0 A.

Inductor sizing. From dI/dt = V_in / L for L1 during the on-time:

L1 = V_in · D / (Δi_L1 · f_sw)
   = 12 · 0.294 / (0.25 · 0.46 · 250 000)
   = 122 µH

For L2 during the on-time, voltage across it is approximately V_C1 − |V_out|:
L2 = |V_out| · (1 − D) / (Δi_L2 · f_sw)
   = 5 · 0.706 / (0.25 · 1.0 · 250 000)
   ≈ 56 µH

Round to 150 µH and 68 µH commercial parts; saturation rating of L1 ≥ 0.6 A, L2 ≥ 1.3 A.

Output capacitor ripple. Because L2 already carries continuous current, the output capacitor only needs to handle the small triangular ripple, not the full switching current. A 22 µF X7R MLCC gives ΔV_out below 20 mV — five times better than the equivalent buck-boost.

Efficiency. Combined switch + diode + winding + capacitor-ESR losses total around 0.6 W at 5 W output, giving η ≈ 89 %.

How Ćuk compares to its single-switch cousins

Topology	V_out / V_in	Input current	Output current	Polarity	Inductors	Typical use
Buck	D	Pulsed	Continuous	Same	1	Step-down POL
Boost	1/(1−D)	Continuous	Pulsed	Same	1	PFC, MPPT
Buck-boost	-D/(1−D)	Pulsed	Pulsed	Inverted	1	Step-up or step-down
SEPIC	D/(1−D)	Continuous	Pulsed	Same	2	Battery rails crossing V_out
Ćuk	-D/(1−D)	Continuous	Continuous	Inverted	2	Quiet supplies, B2B
Zeta	D/(1−D)	Pulsed	Continuous	Same	2	Buck-boost with clean output

Reading the table column-by-column: Ćuk is the only topology where both port currents are continuous. SEPIC trades the inversion for chopped output current; Zeta trades the inversion for chopped input current. The Ćuk converter occupies the corner of the design space where polarity inversion is acceptable and clean currents on both sides are the priority.

The coupled-inductor variant — output ripple to zero

Slobodan Ćuk and R. D. Middlebrook's 1977 Power Electronics Specialists Conference paper showed a remarkable refinement: wind L1 and L2 on a single magnetic core with carefully matched turns ratio (typically 1:1) and a controlled leakage inductance, and the AC ripple currents in the two inductors become equal and 180° out of phase at the output. They cancel.

The cancellation is exact only when the leakage inductance ratio matches the magnetising inductance ratio, but even imperfect coupling drives output ripple down by an order of magnitude relative to the discrete-inductor design. Modern integrated-magnetics Ćuk modules can deliver sub-microvolt output ripple at hundreds of milliamps — useful for low-noise lab supplies, magnetometer biasing, atomic-clock front-ends, and precision data-acquisition front-ends.

Where the 10–15 % efficiency loss comes from

• Transfer-capacitor ESR. The capacitor C1 carries the full switching-frequency ripple current (≈ I_out / (1 − D) RMS in CCM). Even at 10 mΩ ESR and 1.4 A, that is 0.02 W — modest, but accumulating with switching frequency for high-current designs.
• Switch + diode conduction. Same I²R and V_F · I_avg story as any single-switch DC-DC. Replacing the diode with a synchronous FET buys a few percentage points on heavy-load designs but is rarely cost-effective below 25 W.
• Inductor copper + core. Two inductors means two sets of windings and two cores. The two-core penalty is partially offset by smaller individual inductors (≈ 60–70 % of the equivalent buck-boost L), and entirely offset in the coupled-inductor variant which shares one core.
• Switching loss. Same scaling as buck-boost — proportional to f_sw, V_C1², and the FET output capacitance. Ćuk benefits from the ZVS-friendly resonance between L1/L2 leakage and the FET output capacitance when integrated magnetics are used.

Historical context and the inventor

Slobodan Ćuk (pronounced "chook") developed the converter as part of his PhD work under R. D. Middlebrook at Caltech in 1975–1976. The original 1976 patent (US 4,184,197) and the 1977 PESC paper are foundational references in modern power electronics. Middlebrook's state-space averaging framework — developed in the same lab — formed the analytical backbone for understanding the converter's dynamics.

Ćuk went on to found Power Innovations and TESLAco, productising integrated-magnetics power modules for telecom and aerospace markets, and remained a Caltech professor through 2007. The converter is one of the few power-electronics topologies named after an individual; many engineers still pronounce it "kook" or "kuk" but the Croatian original is "Ćuk", pronounced "chook" with the ć softened.

Where Ćuk converters show up

• Battery-to-battery DC-DC for telecom and instrumentation. 12 V → ±12 V or 12 V → −15 V dual rails for op-amp signal chains, where input current ripple on a 12 V bus shared with sensitive loads must stay below tens of microamps.
• Precision sensor power. Magnetometers, hall-effect current sensors, MEMS inertial measurement units, and low-noise photodetector front-ends all benefit from supplies whose ripple is well below their own noise floor.
• Solar-array battery chargers. Some MPPT chargers use a Ćuk stage so the panel side and battery side both see continuous, low-ripple currents — minimising EMI back into the panel string and reducing capacitor stress at the battery terminal.
• Aerospace and space-grade DC-DC modules. Continuous-current ports simplify EMI compliance with MIL-STD-461 and DO-160 conducted-emission limits, and the inverting topology lines up naturally with payload bias rails.
• Audio and laboratory split rails. Precision audio preamps and lab supplies for dual-rail op-amps benefit from the low output ripple, particularly in the coupled-inductor variant.
• Niche LED driver applications. A few specialised constant-current LED drivers exploit the Ćuk topology to keep input current ripple low when sharing a battery bus with a microcontroller.

Common design pitfalls

• Underspeccing C1. The transfer capacitor sees the full ripple current — not the average. A 10 µF MLCC rated to handle 200 mA RMS will fail in minutes if the design pushes 1 A RMS through it. Always check the part's RMS-current curve at your switching frequency.
• Right-half-plane zero. Ćuk shares the buck-boost family's RHP zero in CCM — when the duty cycle rises, output current dips momentarily before climbing. Loop bandwidth must stay well below the RHP-zero frequency; typically 1/5 to 1/10 of it.
• Wrong polarity on initial start-up. Some controller ICs assume V_out > GND. A Ćuk's V_out < GND requires either a controller that natively supports negative outputs or a level-shifting feedback network — many lab-bench failures trace to attaching a positive-feedback IC to an inverting topology.
• Coupled-inductor tuning sensitivity. Output-ripple cancellation requires the turns ratio and leakage inductance to match within a few percent. Sourcing custom magnetics is usually mandatory; off-the-shelf coupled inductors rarely hit the cancellation point cleanly.
• Slow start-up inrush. Both inductors must magnetise from zero, and C1 must charge to V_in + |V_out| before the converter delivers full output. A soft-start that ramps duty cycle over several hundred microseconds is mandatory at higher power; otherwise the first cycle saturates L1 and pops the switch.
• Diode reverse-recovery during the off-to-on transition. Schottkys eliminate the issue at low V_out; SiC Schottkys are mandatory above 100 V. Silicon ultrafast diodes will cause excess switch turn-on loss and EMI spikes.