Differential Pair

What the differential pair does

Take two identical transistors. Join their emitters at one node and pull that node down with a constant current source — the "tail." Drive the two bases with input voltages V+ and V−. Because the tail current source insists the sum of the two collector currents stays fixed, the only freedom the circuit has is how it divides that current between the two sides. A more positive base on one transistor makes it conduct harder and steal current from its partner. The pair therefore reads the difference of its inputs and turns it into a current imbalance — and the imbalance, dropped across collector resistors or an active load, becomes the output voltage.

The crucial trick is what happens when both inputs move together. If V+ and V− both rise by the same amount — say a power-supply ripple or hum coupled onto both wires — the tail current cannot grow, so the split does not change, and the output does not budge. That is common-mode rejection, and it is why the differential pair is the front door of every precision amplifier.

The current-steering law

For a bipolar pair the exact split between the two collector currents follows the difference of two exponential diode laws, which collapses into a hyperbolic tangent:

I_C1 = I_tail · 1 / (1 + e^(−V_id / V_T))
I_C2 = I_tail · 1 / (1 + e^( V_id / V_T))

Differential output current:
  ΔI = I_C1 − I_C2 = I_tail · tanh( V_id / 2V_T )

where:
  V_id = V+ − V−      (differential input, V)
  V_T  = kT/q ≈ 25.85 mV at 300 K
  I_tail = total tail current (A)

The tanh shape is the whole story. Near the origin tanh is linear, so for small V_id the output current is proportional to the input difference. Push V_id past a few V_T and the tanh flattens: all the tail current has steered to one side and the stage saturates. That sharp soft-then-hard transition is exactly what you want in a comparator and exactly what you must tame with feedback in a linear amplifier.

Transconductance and gain

Differentiating the tanh at the balance point (V_id = 0) gives the small-signal differential transconductance:

gm = d(ΔI)/d(V_id) |_(V_id=0) = I_tail / (4·V_T)

Each transistor runs at I_tail/2, so its own gm is (I_tail/2)/V_T;
the differential pair's gm is one-quarter of I_tail/V_T.

Differential voltage gain:
  A_dm = gm · R_load
       = (I_tail / 4V_T) · R_load    (resistive load)
       = gm · r_o                    (active current-mirror load)

Notice gain is set by the tail current. Halve I_tail and you halve gm and the gain, but you also halve the bias current available to charge load capacitance — which is why slew rate, bandwidth and gain in an op-amp all move together with the bias. For a MOSFET pair the law is a square-root rather than a tanh, giving gm = √(μ·C_ox·(W/L)·I_tail); MOS pairs have a wider linear range but lower gm at a given current.

Where common-mode rejection comes from

An ideal tail current source has infinite output impedance: no matter how the common-mode input level moves, the tail current is rock-steady, the split never changes, and CMRR is infinite. Real tail sources have a finite output resistance R_tail, and the common-mode gain is approximately A_cm ≈ −R_load / (2·R_tail). The figure of merit is the ratio:

CMRR = |A_dm / A_cm| ≈ gm · 2·R_tail = 2·gm·R_tail

A simple resistor tail:        R_tail = a few kΩ  → CMRR ~40–60 dB
A current-mirror tail:         R_tail = MΩ        → CMRR ~80–100 dB
A cascoded current source:     R_tail = tens MΩ   → CMRR >100 dB

This is the single most important reason a real op-amp does not bias its tail with a resistor: a high-impedance current source can buy 40–60 dB of extra rejection essentially for free. The other limit is matching — any mismatch between the two transistors or the two load resistors converts a slice of common-mode signal into a differential one, and shows up as input offset voltage and a finite CMRR even with a perfect tail.

BJT vs MOSFET pairs, and load choices

	BJT pair	MOSFET pair	Resistor load	Active (current-mirror) load
Split law	tanh(V_id/2V_T)	square-law / √I	—	—
gm at current I	I_tail/(4V_T) — high	√(μC_ox(W/L)I_tail) — lower	—	—
Linear input range	narrow (~±26 mV)	wider (set by V_ov)	—	—
Input bias current	I_B = I_C/β (nA–µA)	~0 (gate current)	—	—
Output	—	—	differential, two-sided	single-ended, gain ×2
Gain (per side)	—	—	gm·R_C (modest)	gm·r_o (hundreds–thousands)
Typical use	precision, low-noise, RF	CMOS op-amps, high Z_in	discrete, teaching	every monolithic op-amp

Worked example: gain of a bipolar pair

A bipolar differential pair is biased with a tail current of I_tail = 200 µA and loaded with two collector resistors of R_C = 10 kΩ. What is its small-signal differential voltage gain at room temperature?

gm = I_tail / (4·V_T)
   = 200e-6 / (4 × 25.85e-3)
   = 200e-6 / 0.1034
   = 1.93e-3 S        (1.93 mS)

A_dm = gm · R_C
     = 1.93e-3 × 10e3
     = 19.3   (≈ 25.7 dB, single-ended output)

If both collectors are read differentially the gain doubles to ≈ 38.6.

Swap the resistor load for an active current-mirror load with output resistance r_o ≈ 500 kΩ and the gain jumps to gm·r_o ≈ 1.93 mS × 500 kΩ ≈ 965 — nearly two orders of magnitude more, with no extra current. That is precisely the trade a real op-amp makes.

Worked example: CMRR of the same pair

Suppose the tail of that pair is just a 5 kΩ resistor to a negative rail. Estimate the CMRR; then replace the resistor with a current mirror of R_tail = 2 MΩ.

Resistor tail (R_tail = 5 kΩ):
  CMRR ≈ 2·gm·R_tail = 2 × 1.93e-3 × 5e3 = 19.3   ≈ 25.7 dB   (poor)

Current-mirror tail (R_tail = 2 MΩ):
  CMRR ≈ 2 × 1.93e-3 × 2e6 = 7720         ≈ 77.8 dB   (good)

Going from a resistor to a current source bought ~52 dB of common-mode rejection — a factor of 400 — without changing a single signal-path component. This is why almost no serious differential pair uses a bare resistor tail.

Failure modes and trade-offs

• Input offset voltage from mismatch. If the two transistors differ in saturation current I_S, or the two load resistors differ by ΔR/R, a differential output appears with zero input. In bipolar pairs offset is typically 0.1–2 mV; trimming, large devices and careful layout (common-centroid, dummy devices) reduce it. Offset drifts with temperature, so a 1 mV offset can wander tens of µV/°C.
• Limited linear range. The pair is linear only over roughly ±V_T (≈26 mV) for a BJT. Beyond that the tanh bends and the stage distorts. Add emitter degeneration resistors R_E to trade gain for a wider linear range and lower distortion — the gain becomes gm/(1+gm·R_E) but linearity improves dramatically.
• Finite tail impedance kills CMRR. A resistor tail or a sloppy current source lets common-mode signals leak to the output, as the worked example shows. Cascode the tail source to push CMRR past 100 dB.
• Input bias current loading. A bipolar pair draws base current I_B = I_C/β. With β = 200 and I_C = 100 µA, each input sinks 0.5 µA — flowing through a 1 MΩ source resistance that is a 0.5 V error. MOS or BiFET pairs sidestep this with near-zero gate current.
• Tail-current dependence of everything. Because gm ∝ I_tail, temperature drift or supply variation in the tail moves the gain, bandwidth and offset together. PTAT (proportional-to-absolute-temperature) biasing is often used to make gm·V_T track and stabilize behavior.
• Common-mode input range limits. Push the common-mode level too high and the load saturates; too low and the tail source runs out of headroom and collapses, abruptly destroying the differential action. Rail-to-rail input stages stitch together an NPN and a PNP pair to cover the whole range.

Where you find it

• Op-amp input stage. Every classic op-amp — from the 741 to modern CMOS parts — starts with a differential pair feeding a current-mirror load. The pair's gm sets the unity-gain bandwidth via f_T ≈ gm/(2π·C_c).
• Comparators. Run open-loop, the same pair fully steers on a few millivolts of input difference — the basis of every voltage comparator and the input of every ADC.
• Gilbert cell / mixers. Stacked differential pairs multiply two signals — the heart of RF mixers, modulators and variable-gain amplifiers.
• Current-mode logic (CML / ECL) and LVDS. Differential pairs switch a tail current between two paths to make the fastest logic and the most noise-immune high-speed serial links (USB, PCIe, HDMI all ride differential signaling).
• Instrumentation amplifiers. Three op-amps — each a differential pair at heart — measure tiny sensor differences riding on large common-mode voltages, exactly the job the topology was born for.