Solar Cell (Photovoltaic)

The trick: a junction that points electrons one way

Every photovoltaic cell ever built — silicon, gallium arsenide, cadmium telluride, perovskite — is built around the same idea. Take a semiconductor crystal. Dope one side with atoms that have extra electrons (n-type), and the other with atoms that lack one (p-type). Mash them together. At the interface, electrons diffuse from n to p and holes from p to n; the migration leaves behind ionised dopants, building a static electric field across a thin depletion region that opposes further diffusion. In equilibrium the field is roughly 10⁵ V/m across a region 0.1-1 μm wide. That field is the engine of the entire device.

Now shine light on the junction. Photons with energy above the band gap E_g are absorbed by valence electrons, kicking them into the conduction band and leaving holes behind. Photons below E_g pass straight through — the crystal is transparent to them. In an undoped semiconductor, the excited electron-hole pair recombines within microseconds and re-emits a photon, accomplishing nothing useful. But in the depletion region, the built-in field grabs the carriers before they can recombine: electrons drift toward the n-side, holes toward the p-side. Once they reach the bulk material on either side they are majority carriers and travel freely to the metal contacts. Wire those contacts through an external load, and the separated carriers drive current around the circuit.

That is the entire principle. Everything else — the choice of semiconductor, the cell architecture, the anti-reflection coating, the metal grid pattern, the back-surface field, the inverter — is engineering to keep more of the photons doing useful work and fewer leaking energy somewhere wasteful.

The band gap sets the trade-off

For a given semiconductor, the band gap E_g sets two things in tension. Photons below E_g cannot be absorbed at all — they are pure transparency loss. Photons above E_g are absorbed, but their excess energy hν − E_g goes into hot phonons (heat) within picoseconds — pure thermalisation loss. The voltage you can extract from each absorbed photon is at best the band-gap voltage E_g / e, regardless of how energetic the photon was. A 3 eV ultraviolet photon and a 1.2 eV near-infrared photon, absorbed by silicon, both produce one electron-hole pair contributing the same ~0.7 V at the terminals. The other 2.3 eV from the UV photon is lost as heat.

Semiconductor	Band gap E_g	SQ limit @ AM1.5	Commercial cells
Germanium	0.67 eV	~24 %	used as bottom of multi-junction
Silicon (Si)	1.12 eV	~32 %	22-26 % (HJT, IBC, TOPCon)
GaAs	1.42 eV	~33.7 %	up to 29 % (single-J record)
CdTe	1.50 eV	~33 %	~19 % (First Solar Series 7)
CIGS	1.0-1.7 eV (tunable)	~33 %	~21 % (Solar Frontier, Solibro)
Perovskite (MAPbI₃ etc.)	1.5-1.7 eV (tunable)	~33 %	~26 % single-J, >33 % in Si tandem

The optimum single-junction band gap under the AM1.5G spectrum is around 1.34 eV, which is essentially GaAs. Silicon sits slightly off that optimum but is preferred everywhere outside satellites because it is hundreds of times cheaper. CdTe and CIGS occupy the high-end of the band-gap range and dominate the thin-film market; perovskite is the new contender that, combined with silicon in a tandem, breaks the single-junction ceiling altogether.

The Shockley-Queisser limit, sketched

In 1961 William Shockley and Hans Queisser published the canonical efficiency limit for a single-junction cell. The derivation assumes: (1) one band gap, (2) the AM1.5G solar spectrum, (3) carriers thermalise instantly to the band edge after absorption, (4) the only recombination is radiative (every electron-hole pair either contributes to current or re-emits a photon), and (5) the cell is at 300 K. From those assumptions you can write the net current as photon absorption minus radiative emission and integrate over the spectrum.

J(V) = J_ph(E_g) − J_0(E_g) · [ exp(eV/kT) − 1 ]

J_ph = e ∫_{E_g}^∞  φ_sun(E) dE          (photo-current)
J_0  = (2π e / h³c²) · ∫_{E_g}^∞ E² / [exp(E/kT) − 1] dE   (dark current, AM0)

Maximising power P = J(V) · V over V gives the maximum-power-point operating voltage V_MP, the corresponding current J_MP, and the efficiency η = P_MP / P_sun. The result as a function of E_g peaks at 33.7 percent at E_g ≈ 1.34 eV, slips to 32 percent at silicon's 1.12 eV, and falls off rapidly on both sides. The four loss mechanisms baked into the limit are:

• Sub-band-gap (transparency) loss. Photons with hν < E_g are not absorbed. For silicon at 1.12 eV this is about 19 percent of solar energy.
• Thermalisation loss. Photons with hν > E_g lose the excess (hν − E_g) as heat. For silicon, about 33 percent of solar energy.
• Voltage gap loss. Even at open circuit, V_OC is less than E_g/e because some band-gap energy is needed to drive the chemical potential split.
• Fill-factor loss. The I-V curve is not a perfect rectangle; FF ≈ 0.85 is the limit for ideal radiative recombination.

Anything you do that violates the assumptions can push past the limit. Multi-junction stacks attack thermalisation directly; hot-carrier cells try to extract electrons before they thermalise; intermediate-band cells absorb sub-band-gap photons via a midgap state; concentrators reduce the entropic voltage-gap loss by collecting from a smaller solid angle. The SQ limit is the wall for the assumptions; the assumptions are not laws of physics.

Where real silicon cells lose the extra 8 percent

The 32 percent SQ ceiling for silicon includes only radiative recombination. Real cells suffer additional, non-fundamental losses that the architecture race has been chipping away at for fifty years.

Loss mechanism	Magnitude (typical)	Mitigation
Front-surface reflection	30 % bare Si → 3 % textured + ARC	pyramidal texturing + SiNₓ anti-reflection coat
Front-grid shading	3-5 % (typical busbars)	narrow fingers, multi-busbar, or IBC (no front metal)
Shockley-Read-Hall (defect) recombination	varies with wafer quality	monocrystalline Czochralski, hydrogenation, gettering
Auger recombination	≥ 1 % at high carrier density	fundamental; sets the silicon SQ ceiling near 29.4 %
Surface recombination	large at unpassivated contacts	SiO₂/SiNₓ passivation, PERC, TOPCon, HJT a-Si:H
Series resistance	FF loss of 2-3 %	Ag finger geometry, contact resistance engineering
Shunt resistance	FF loss of 1-2 %	edge isolation, clean process control
Module losses (cell → module)	10-20 %	low-iron glass, EVA encapsulant, ribbon optimisation

The Auger-limited efficiency for crystalline silicon is around 29.4 percent (Richter, Hermle, Glunz 2013). The current record is 27.1 percent — within 2.3 percentage points of the intrinsic ceiling. Commercial modules ship at 22-23 percent module-level efficiency. The gap between cell and module is the focus of the next decade.

The I-V curve and maximum power point

Under illumination, a solar cell is well-modelled as an ideal current source J_L (the photo-current, proportional to light intensity) in parallel with the cell's own diode and small parasitic resistances. The terminal current as a function of voltage is

J(V) = J_L  −  J_0 [ exp(eV / nkT) − 1 ]  −  V/R_sh
with series-resistance correction V → V + JR_s

Four numbers fully characterise the cell:

• Short-circuit current J_SC ≈ J_L. The current at V = 0. Proportional to illumination. For a 156 × 156 mm silicon cell at AM1.5, J_SC ≈ 9-10 A.
• Open-circuit voltage V_OC. The voltage at J = 0. Sets by the ratio J_L / J_0; for silicon, V_OC ≈ 0.65-0.74 V at one-sun, room temperature. Heterojunction cells push V_OC above 0.74 V; the Auger limit is around 0.76 V.
• Maximum-power-point (V_MP, J_MP). The operating point that maximises P = JV. V_MP ≈ 0.55-0.60 V, J_MP ≈ 0.93 × J_SC for silicon.
• Fill factor FF = P_MP / (V_OC × J_SC). A dimensionless figure of merit, 0.78-0.85 for good cells. FF degrades with series resistance, shunt leakage, and recombination.

Efficiency is then η = P_MP / P_in = V_OC × J_SC × FF / P_in. The MPP tracker in every inverter walks V continuously to keep the cell at its instantaneous best operating point — illumination, temperature, and shading shift the curve in real time.

Worked example: power from a 60-cell residential panel

Take a standard 60-cell M10 (182 mm) silicon panel under standard test conditions (1000 W/m², 25 °C, AM1.5G).

Cell area:        A_c = 0.182 × 0.182 m² ≈ 331 cm²
Cell J_SC:        ≈ 13.5 A         (at 1000 W/m²)
Cell V_OC:        ≈ 0.685 V
Cell V_MP:        ≈ 0.575 V
Cell I_MP:        ≈ 13.0 A
Cell P_MP:        ≈ 7.5 W

60 cells in series:
Panel V_OC:       ≈ 41.1 V
Panel V_MP:       ≈ 34.5 V
Panel I_MP:       ≈ 13.0 A
Panel P_MP:       ≈ 449 W

Module area:      ≈ 1.95 m² (glass area)
Module efficiency η_mod = 449 W / (1.95 m² × 1000 W/m²) ≈ 23 %

That panel, at retail in 2024, costs about $45 — roughly $0.10 per watt. The 1954 Bell Labs cell delivered 6 percent efficiency at a few hundred dollars per watt; the same 449 W rating would have cost around $100,000 in 1954 dollars. Cost has fallen by something like a factor of a thousand once inflation is included.

Cell architectures: PERC, TOPCon, HJT, IBC

The architecture race is the story of where the rear contact sits, what passivates it, and how cleanly you can split the metal-silicon interface chemically.

Architecture	Year mainstream	Record cell η	Mechanism
Al-BSF (aluminium back-surface-field)	1980s-2017	~20 %	full-area Al rear; simple but high rear recombination
PERC	2018-2023	24.06 % (Trina)	dielectric stack on rear with laser-opened local contacts
TOPCon	2024-	26.6 % (LONGi)	thin tunnel-oxide + doped polysilicon at rear
HJT (Heterojunction)	commercial since 1997 (Panasonic HIT)	26.81 % (LONGi 2022)	a-Si:H passivation between c-Si and TCO contacts
IBC (Interdigitated Back Contact)	SunPower since 2000s	26.7 % (Maxeon)	both polarities on rear; no front metallisation shading
HBC (Heterojunction + IBC)	research	26.81 % (Kaneka 2017)	combines HJT passivation with IBC geometry
Perovskite-Si tandem	2025+ (early commercial)	33.9 % (LONGi 2024)	perovskite top cell on silicon bottom cell

PERC dominated cell production from about 2018 through 2023. TOPCon overtook it in 2024 as cost and efficiency converged. HJT remains a smaller share (LONGi, Risen, Meyer Burger) with a structural efficiency edge but a more expensive process. Perovskite-silicon tandems are crossing from lab to pilot production now; the first commercial modules at scale are expected from Oxford PV, Qcells, LONGi and others through 2026.

Multi-junction cells: how to beat the Shockley-Queisser limit

The way to escape the single-junction ceiling is to stack semiconductors of descending band gaps so each photon is absorbed by a layer matched to its energy. A two-junction cell has a top cell with high band gap (absorbing blue and UV) and a bottom cell with low band gap (catching what passes through). They are wired in series, so the current is set by whichever layer produces less; careful design current-matches them under the AM1.5 spectrum. The theoretical limit climbs to roughly 45 percent for two junctions, ~50 percent for three, ~55 percent for four, and asymptotically 86 percent for infinite junctions under unconcentrated sunlight.

III-V multi-junction cells made of GaInP / GaAs / Ge or four-junction GaInP / GaAs / GaInAsP / GaInAs are the workhorse of every modern satellite and Mars rover, with efficiencies above 30 percent under one sun and above 47 percent under concentrated sunlight. They cost roughly $100-1000 per watt — fine when launch mass dominates economics, hopeless for terrestrial rooftops.

The terrestrial path forward is perovskite-on-silicon. A thin metal-halide perovskite layer with E_g ≈ 1.65-1.7 eV deposited on a silicon bottom cell (E_g = 1.12 eV) gives a near-ideal pair. Lab efficiencies have rocketed past 33 percent in 2024 (LONGi at 33.9 percent, Oxford PV, KAUST, NREL all in similar territory). The remaining barriers are stability — perovskites degrade under heat, humidity and UV more than silicon — and scaling perovskite deposition uniformly across an M10 wafer. Both are being engineered down.

Why solar got cheap — Wright's Law applied

Module prices in real dollars per watt have fallen on a remarkably stable trajectory since 1976. Plot cumulative installed capacity against module price on log-log axes and you get a straight line with slope corresponding to a roughly 20-23 percent learning rate — every doubling of cumulative production has historically dropped price by about 20 percent. By 2024 cumulative PV deployment had crossed 1.5 TW; module prices were under $0.10/W; the curve has held for more than fifteen doublings.

The specific cost reductions stack:

• Polysilicon. The Siemens process and later fluidised-bed reactors dropped from $475/kg in 2008 to under $10/kg in 2024. Solar polysilicon now accounts for less than $0.02/W.
• Wafer thinning. Standard cell thickness fell from 300 μm in 2000 to 130 μm in 2024, halving silicon use per watt.
• Diamond-wire sawing. Replaced slurry sawing around 2015, cutting kerf loss from ~150 μm to ~60 μm and tripling slicing throughput.
• Cell efficiency. Going from 14 percent to 23 percent at the same area yields 64 percent more watts from the same wafer.
• Module format scaling. M0 (125 mm) → M2 (156 mm) → M6 (166 mm) → M10 (182 mm) → G12 (210 mm) — each step spreads fixed module costs over more watts.
• Megafactories. Chinese cell and module lines scaled from 100 MW (2008) to 30+ GW per fab (2024), with associated unit-cost compression of equipment, labour and overhead.
• Balance-of-system. Inverters dropped from $0.70/W to $0.05/W over the same period; racking, wiring and installation became commodity items.

By 2023 solar PV represented the largest single source of new electrical generating capacity added globally — more than fossil fuels, nuclear, and other renewables combined. Annual additions exceeded 400 GW, with China alone accounting for more than half. Solar electricity, levelised, is now below 3 ¢/kWh in many sunny markets — cheaper than gas, coal, and nuclear new-build.

Variants and related cell technologies

• Bifacial cells and modules. Both faces of the cell are active; rear face picks up ground-reflected (albedo) light. Bifacial gain is typically 5-15 percent in real installations on sand or concrete; up to 30 percent over snow or white roofs.
• Thin-film CdTe. First Solar's flagship technology; deposited as a few-μm layer on glass. ~19 percent module efficiency, very low capex, fastest energy payback. Concerns about cadmium toxicity are mitigated by encapsulation and end-of-life recycling.
• CIGS (copper indium gallium selenide). Tunable band gap by changing Ga/In ratio; ~21 percent record cells. Less commercial traction than CdTe but flexible substrate variants are useful for building-integrated and aerospace applications.
• Amorphous silicon (a-Si). Largely obsolete for power generation but ubiquitous in low-power consumer electronics (calculators, watches) due to high response under indoor lighting.
• Dye-sensitised cells (DSSCs). Grätzel's 1991 architecture — TiO₂ nanoparticles sensitised with a ruthenium dye in a liquid electrolyte. Cheap, semi-transparent, ~13 percent record but stability issues prevent mass commercial use.
• Organic photovoltaics (OPV). Polymer/fullerene blends; flexible, light, and printable, but limited to ~19 percent lab efficiency and challenged on lifetime.
• Concentrating PV (CPV). Lenses or mirrors concentrate sunlight 100-1000× onto small high-efficiency multi-junction cells. Sensible only in extremely sunny direct-beam climates; lost to flat-plate silicon on cost.
• Quantum-dot solar cells. Colloidal semiconductor nanocrystals; band gap tuned by particle size. Research-stage, ~18 percent record. Promising for tandems and infrared harvesting.

Where photovoltaics power the world

• Utility-scale PV plants. Hundreds of megawatts to multiple gigawatts in a single project: the Bhadla Solar Park in Rajasthan (2.25 GW), the Pavagada Park in Karnataka (2 GW), and the Mohammed bin Rashid Al Maktoum park in Dubai (5 GW planned). Levelised cost in 1500+ kWh/m²/yr regions is below 2 ¢/kWh.
• Residential rooftop. The dominant retail PV format. A 6-8 kW system covers an average US household's annual consumption; payback of 6-12 years depending on incentives, electricity prices and sunlight.
• Commercial and industrial rooftops. Warehouses, parking-garage canopies, supermarkets; usually behind-the-meter, sized to onsite demand to maximise self-consumption value.
• Floating PV. Modules mounted on pontoon arrays over reservoirs and lakes. Reduces evaporation, cools modules (a few percent efficiency bonus), and avoids land-use conflict. China, India and Singapore lead deployment.
• Off-grid and microgrid. Standalone systems for remote homes, telecoms towers, agricultural pumps, and rural electrification. Combines PV with batteries and sometimes diesel backup.
• Spacecraft and satellites. Triple- and quadruple-junction III-V cells with end-of-life efficiency above 30 percent after radiation degradation. ISS solar arrays generate 84-120 kW. Every modern interplanetary probe out to Jupiter (Juno) runs on photovoltaics; beyond that, RTGs take over.
• Consumer electronics. Watches, calculators, garden lights, IoT sensors. Amorphous silicon and small crystalline cells. Low absolute output but high light-to-data efficiency at indoor levels.
• Vehicle-integrated PV. Toyota, Hyundai and Aptera have shipped or prototyped solar roofs; useful for adding 10-50 km of range per sunny day. Niche today but growing with cell efficiency.

Lifetime and degradation

A modern silicon module is warrantied for 25 years of operation. Real-world degradation rates are typically 0.4-0.7 percent per year, with HJT and IBC modules at the low end and older a-Si and CIGS at the higher end. The dominant mechanisms are:

• Light-induced degradation (LID). Boron-oxygen complexes form under illumination and trap carriers, losing 1-3 percent of initial output in the first weeks. PERC modules use gallium doping or hydrogenation to suppress this.
• Potential-induced degradation (PID). Long-term ion migration under the cell-to-frame voltage; controllable by grounding scheme and encapsulant choice.
• UV-induced encapsulant yellowing. EVA polymer yellows after 10-20 years, transmitting less light. UV-stabilised EVA and POE are the current solutions.
• Cell cracking. Microcracks from transport, snow load, or hail. Half-cell module designs (now mainstream) reduce the current per cell-half and mitigate hot-spot risk.
• Solder-joint fatigue. Thermal cycling drives cell-to-ribbon contact degradation; multi-busbar and gluing approaches reduce stress.

End-of-life modules — typically 80 percent of original output after 25 years — are entering the waste stream in significant volume for the first time in the late 2020s. Recycling streams recover glass, aluminium, silicon and copper at growing rates; the industry is racing to scale dedicated PV recyclers (Veolia, ROSI, others) ahead of the wave.

Common pitfalls

• Confusing efficiency with energy yield. A 23 percent module in Phoenix outproduces a 23 percent module in Hamburg by roughly 2× per year, because Phoenix gets more annual irradiance. Compare kWh/kW (specific yield) not just η when sizing or evaluating systems.
• Ignoring temperature coefficient. V_OC drops about 0.3 percent per °C above 25 °C; on a hot roof at 60 °C, a silicon module makes about 10 percent less power than its STC rating. HJT and TOPCon cells have somewhat better temperature coefficients than PERC.
• Forgetting shading non-linearity. A single shaded cell can throttle an entire series string. Bypass diodes mitigate but do not eliminate; module-level power electronics (microinverters, optimisers) restore performance under heavy shading.
• Treating V_OC × I_SC as deliverable power. No real load operates at the maximum-current and maximum-voltage points simultaneously. Always work in P_MP and use fill factor to relate it to V_OC × I_SC.
• Confusing cell, module and system efficiency. A 26 percent cell becomes a 22-23 percent module (because of glass, frame, gaps between cells, encapsulant absorption) and a 19-20 percent AC system (because of inverter, wiring, and array mismatch losses).
• Misreading the Shockley-Queisser limit. SQ is the theoretical ceiling for a single junction with radiative-only recombination. It is not a law that "solar cells cannot exceed 33 percent" — multi-junction cells already do, by stacking band gaps. SQ is the wall for one set of assumptions, not for photovoltaics in general.
• Treating Bell Labs 1954 as the invention date. The photovoltaic effect was discovered by Becquerel in 1839; selenium cells were built in the 1880s; Einstein's photoelectric explanation came in 1905. Chapin, Fuller and Pearson's 1954 silicon cell was the first practical device, but the principle is much older.