Boost Converter

What a boost converter actually is

A boost converter is the simplest switch-mode circuit that produces an output voltage higher than its input. It uses four parts, in this order along the power path:

1. an inductor L in series with the input supply;
2. a controlled switch (almost always an N-channel MOSFET) connecting the inductor's far end to ground;
3. a diode (a fast Schottky for low voltage, an ultrafast silicon or SiC for high voltage) from the same node to the output;
4. an output capacitor C across the load.

A small controller chip — TI's TPS61xxx, Analog Devices' LT8330, ON Semi's NCP3063, or in modern PCs an integrated module like Renesas's ISL68xxx — pulses the switch on and off at a fixed frequency (50 kHz to several MHz) while modulating the on-time. That modulation, the duty cycle D, is the only knob: it sets the output voltage. Everything else is consequence.

How it actually works, beat by beat

The two phases of every switching cycle are easier to picture as two completely separate circuits.

Switch closed (interval D·T). The MOSFET shorts the inductor's output node to ground. The full input voltage V_in is dropped across the inductor, so di/dt = V_in / L. The inductor current ramps up linearly, storing energy ½LI² in its magnetic field. The diode is reverse-biased, so the output capacitor alone supplies the load — it sags slightly as it discharges.

Switch open (interval (1−D)·T). The switch suddenly disconnects. The inductor refuses to let its current change abruptly (an inductor enforces continuity of current the way a capacitor enforces continuity of voltage), so the voltage at the switch node flies upward until the diode forward-biases. Now the inductor is connected in series with V_in, driving current through the diode into the output capacitor. The inductor current ramps down at rate (V_out − V_in)/L, because V_out − V_in is the voltage now dropped across L. The capacitor recharges, the load draws its steady current, and the cycle repeats at the next clock edge.

The key intuition is that the inductor is reused as an energy reservoir twice per cycle: it gulps up energy from V_in at low voltage and pours it out at high voltage. Power is conserved: V_in · I_in,avg = V_out · I_out · η. Because V_out > V_in, average input current must exceed output current.

The duty cycle equation

For a converter in steady state, the inductor's volt-seconds over one cycle must integrate to zero — otherwise its current would drift monotonically and the converter would not be in steady state at all. Applying that constraint to the two intervals:

V_in · D · T  −  (V_out − V_in) · (1 − D) · T  =  0

Solving for the ratio:

V_out / V_in  =  1 / (1 − D)

This is the most useful single equation in switching power. A few values are worth memorising:

Duty cycle D	V_out / V_in	Example (5 V in)
0.0	1.0×	5.0 V (no boost)
0.25	1.33×	6.7 V
0.50	2.0×	10 V
0.67	3.0×	15 V
0.80	5.0×	25 V
0.90	10×	50 V (lossy in practice)
0.95	20×	100 V (rarely achievable)

Notice that the gain explodes as D → 1, but in real circuits losses also explode. The peak inductor current scales as I_out / (1−D), so a 90 % duty cycle moves ten times the output current through the inductor every cycle. The I²R losses in the switch, inductor DCR, and diode dominate, and efficiency collapses. Practical single-stage boost converters are therefore limited to about 5–8× step-up; beyond that, designers cascade two boost stages or move to coupled-inductor flyback / forward topologies.

Sizing the inductor

The inductor's job is to keep the ripple current Δi_L within an acceptable fraction of the average. From di/dt = V_in / L applied over the on-time:

Δi_L = V_in · D / (L · f)    →    L = V_in · D / (Δi_L · f)

Designers typically aim for Δi_L of 20–40 % of the average inductor current at the rated load. Too small a ripple demands a large, expensive inductor; too large a ripple pushes the converter into discontinuous conduction at light load and increases RMS losses everywhere. Higher switching frequency f shrinks L proportionally — that is the entire reason GaN and SiC switches, which run cleanly at 1–5 MHz, can make a 65 W USB-PD brick smaller than a credit card.

Worked example: 12 V from a 5 V USB rail

Suppose we want to drive a small motor that needs 12 V at 1 A from a 5 V USB-A port, switching at 500 kHz with Δi_L = 30 % of I_L,avg.

First, find the duty cycle:

D = 1 − V_in / V_out = 1 − 5/12 = 0.583

Average inductor current (CCM) is the input current, set by power balance with η ≈ 0.9:

I_L,avg = I_out / (1−D) = 1 / 0.417 ≈ 2.4 A
        — or via power: P_in = V_out · I_out / η = 12 · 1 / 0.9 = 13.3 W
        I_L,avg = P_in / V_in = 13.3 / 5 = 2.67 A   (close enough)

Pick Δi_L = 0.3 × 2.4 = 0.72 A. Then:

L = V_in · D / (Δi_L · f) = 5 · 0.583 / (0.72 · 500 000) ≈ 8.1 µH

A standard 10 µH shielded power inductor with a saturation current of 4 A (peak inductor current is 2.4 + 0.36 = 2.76 A, comfortably below saturation) will work. The MOSFET must handle 2.76 A peak and block at least V_out + a margin, so a 30 V part is appropriate. A 30 V, 3 A Schottky diode handles the output rectification. The output capacitor is sized by ripple: ΔV_C = I_out · D · T / C, so a 22–47 µF X5R MLCC gives sub-50 mV ripple.

Continuous and discontinuous conduction

The analysis above assumes the inductor current stays above zero throughout the cycle — continuous conduction mode (CCM). At light loads, the current ramps down to zero before the next cycle starts, then stays at zero until the switch closes again: discontinuous conduction mode (DCM). The two modes are not just bookkeeping curiosities; they behave very differently.

Property	CCM	DCM
Voltage gain	1/(1−D), load-independent	Depends on load, L, and f
Peak inductor current	Low (around the average)	High (must carry all charge in part of cycle)
RMS losses	Lower	Higher per amp
Light-load efficiency	Worse (switching losses dominate)	Better (skip-mode reduces switching)
Diode current	Trapezoidal, never zero between cycles	Triangular, returns to zero each cycle
Compensator design	Right-half-plane zero, harder to stabilise	First-order, easier
Use case	Heavy, steady load (servers, EVs)	Light/intermittent load (battery-powered IoT)

The CCM/DCM boundary is at the critical inductance L_crit = V_in · D · (1−D)² · T / (2·I_out). If L > L_crit at minimum load, the converter stays in CCM; otherwise it slips into DCM. Many modern controllers explicitly switch between forced-PWM CCM (at heavy load) and skip-mode DCM (at light load) to extract the best efficiency across the full operating range.

The right-half-plane zero

Boost converters in CCM have a notorious quirk in their small-signal response: a right-half-plane (RHP) zero. Intuitively, when the controller demands more output, it must first increase the duty cycle, which means the diode conducts for a shorter fraction of each cycle. For a moment, average diode current — and therefore output current — drops. Only after the inductor current has had time to build up does the output rise. The transient sign reversal between control input and observed output appears as a zero in the right half of the s-plane.

The practical consequence is that the control loop bandwidth must be kept well below the RHP-zero frequency (typically f_RHPZ = R_load · (1−D)² / (2π · L)), which often limits boost converters to bandwidths of a few kilohertz. Type-III voltage-mode and current-mode-with-slope-compensation control schemes are designed to extract the maximum stable bandwidth.

Why not just use a linear regulator?

A linear regulator cannot produce an output higher than its input — it is a controlled resistor between supply and load, and resistors only drop voltage. To step up, switching is the only option without transformer-coupled magnetic isolation. Even comparing apples to apples in step-down: a linear regulator's efficiency is exactly V_out / V_in, so dropping 12 V to 5 V wastes 58 % of the input power as heat. A buck converter performing the same conversion runs at 90–95 %. The boost equivalent has no linear counterpart at all — there is no passive way to make a low DC voltage higher.

Where boost converters show up

• Power factor correction (PFC) front-ends. Every AC adapter above ~75 W (IEC 61000-3-2 Class D limit) uses a boost stage right after the bridge rectifier. It pumps the rectified mains up to a 380–400 V DC bus while shaping input current to mimic the input voltage — making the device look resistive to the grid. Typical chips: ON Semi NCP1654, Infineon ICE3PCS01, TI UCC28019.
• Solar MPPT charge controllers. When a solar panel sits below the battery voltage (common for cold cells, partial shading, or low-voltage modules feeding a 24/48 V bank), a boost converter steps the panel voltage up to the battery while the MPPT loop adjusts the duty cycle to hold the panel at its maximum-power point. Victron's BlueSolar MPPT and Outback's FlexMax both carry boost-capable stages.
• LED drivers. A string of LEDs needs constant current, not constant voltage; a boost converter can drive a long series string from a battery whose voltage is below the string's forward drop (e.g. driving a 36 V LED string from 12 V automotive). Inductor and switch are sized for the LED current, with current-sense feedback closing the loop.
• USB-PD step-up. A USB-PD source must produce voltages between 5 V and 20 V (or 28/36/48 V in PD 3.1 EPR) from whatever input rail the charger has. Modern fast chargers use a flyback or LLC stage to a working DC bus and then a synchronous boost-buck converter to land precisely on the negotiated voltage — every USB-PD charger has a boost stage hiding somewhere on its board.
• EV traction up-converters. A boost converter (often called a "DC link booster") sits between the battery pack and the inverter in many electric vehicle drivetrains — Toyota Prius and BMW i3 are the textbook examples — to raise the link voltage from 200–400 V battery to 600–800 V inverter input. That lets the motor exploit higher rated speed without raising battery cell count.
• Photoflash and capacitor chargers. A handheld flash uses a small boost converter (often a self-oscillating Royer or Joule thief at hobbyist level) to pump a few volts up to 300 V across a photoflash capacitor, ready to dump into a xenon tube in 1 ms.
• Sensor and bias rails. CCD/CMOS image sensors, OLED panels, and avalanche photodiodes all need bias rails (15–80 V) that are nowhere on a phone's PMIC; tiny single-chip boost converters at >1 MHz generate them on demand and shut down when idle.

Variants and extensions

• Synchronous boost. Replaces the diode with a second MOSFET driven in anti-phase to the main switch, eliminating diode forward-voltage loss (0.3–0.7 V × I_out) and raising efficiency by several percentage points. Standard above ~5 A or for battery-fed applications where every milliwatt counts.
• Multi-phase / interleaved boost. Two or more boost stages running in parallel with phase-staggered clocks. Each phase carries half (or 1/N) the current, reducing input/output ripple by partial cancellation and shrinking magnetics. Used in high-current PFC front-ends and server PSUs.
• Boost-buck (4-switch buck-boost). Combines a buck stage and a boost stage with shared inductor; can produce V_out either above or below V_in, the workhorse of USB-PD chargers that must hand-off across the input range.
• SEPIC and Ćuk. Topologies that allow V_out higher or lower than V_in and non-inverting output, at the cost of a second magnetic element. Used where boost-buck transitions would cause glitches.
• Coupled-inductor boost / flyback. Replaces the single inductor with a 1:N coupled inductor, multiplying the gain by the turns ratio. Enables very high boost ratios (20–100×) without driving D anywhere near unity. The flyback is the dominant topology for low-power AC/DC adapters.
• Three-level / multilevel boost. Switching nodes are split into multiple sub-switches and capacitors, sharing the off-state voltage stress between them. Lets a converter use lower-voltage (faster, cheaper) MOSFETs at a high output voltage and reduces EMI.

Common pitfalls

• Forgetting the no-load path. A boost converter has a direct DC path from input to output through the inductor and diode — even when the switch is off, V_in − V_diode appears on the output. You cannot "turn off" a boost converter by halting the switch unless you also disconnect the input. Designs that need a hard off-state add an input-side disconnect FET.
• Overlooking inrush. On startup, the output cap is at 0 V and the input rises to V_in; the inductor and diode become a near-direct path that can draw hundreds of amps for a millisecond. Soft-start ramps or NTC inrush limiters are mandatory above a few watts.
• Underestimating EMI. The switch node rises and falls at di/dt > 100 A/µs. Without careful layout (short ground returns, snubbers, copper-pour planes), the converter radiates and conducts noise that fails CE/FCC. Many "mystery" failures in lab prototypes are simply EMI re-entering nearby sensitive circuits.
• Treating the RHP zero as theoretical. A loop designed without accounting for the RHP zero will oscillate at the corner where the zero would have stabilised it. Bandwidth must be set conservatively, especially for inputs near the lower end of the V_in range where the RHP-zero frequency is lowest.
• Assuming the formula at D > 0.85. Real efficiency, ripple, and component stress diverge from the ideal model long before the formula's singularity at D = 1. A boost converter operating at D = 0.95 is either a research prototype, a fault, or about to be one.
• Diode reverse-recovery. Silicon ultrafast diodes still take 20–80 ns to recover; during recovery, current flows backward through them and dumps energy in the switch as it turns on. Use Schottky (no recovery) wherever the reverse voltage allows, or SiC Schottky for V_out > 200 V.