Surge Arrester

How a surge arrester works

Picture a switch wired in parallel with the equipment you want to protect — a transformer, a motor, an electronics board — with the other side of the switch going straight to ground. While the line voltage stays normal, the switch is open and invisible: no current flows through it, all the current goes to the load. The instant the voltage spikes above a threshold, the switch slams closed, dumps the surge to ground, and re-opens the moment the spike passes. A surge arrester is that switch, except there are no moving parts and the "switching" happens in the crystal physics of a ceramic in well under 25 nanoseconds.

The ceramic is a metal-oxide varistor (MOV), almost always sintered zinc oxide doped with bismuth, antimony, cobalt, manganese, and a handful of other oxides. Under a microscope it's a mosaic of conductive ZnO grains roughly 10 to 100 µm across, each grain wrapped in a thin (a few nm) insulating grain boundary rich in bismuth. Every grain boundary acts like a pair of back-to-back Zener diodes with a breakdown around 3.2 to 3.6 V. Below breakdown the boundaries block, and the disc behaves like a leaky capacitor in parallel with a near-infinite resistance. Push the voltage above breakdown and electrons tunnel and avalanche across the boundaries; resistance collapses from gigaohms to milliohms, and the disc happily carries kiloamps.

Because the surge current path is hundreds of grain boundaries in series, the disc voltage is set by how many boundaries are conducting — which is why the clamp voltage is so flat across a huge current range. That flatness is the difference between a varistor and an ordinary resistor:

Varistor I-V law:   I = k · V^α

  α   = non-linearity exponent (ZnO: 25 to 50; SiC: 4 to 6; ohmic R: 1)
  V_b = breakdown threshold per grain boundary ≈ 3.2 to 3.6 V
  N   = boundaries in series  →  V_clamp ≈ N · V_b

With α = 30, a 1.26× voltage rise (V → 1.26V) multiplies current by:
  1.26^30 ≈ 1000×

So a +26% overvoltage drives a 1000× current surge to ground,
yet the voltage across the device barely moves. That is the clamp.

That single number — α between 25 and 50 — is why modern arresters need no spark gaps. The older silicon-carbide (SiC) elements had α of only 4 to 6, so at normal voltage they leaked far too much current to sit directly across the line; they needed series spark gaps to isolate them until a surge arced the gap over. Zinc oxide is non-linear enough to connect gaplessly, leaking only a fraction of a milliamp continuously, and that is the entire modern design.

The protective coordination math

Designing an arrester into a system is a voltage-coordination problem: the arrester must let through enough that it never conducts in normal service, yet clamp low enough that the protected insulation never sees its withstand limit. Four voltages define the window:

MCOV  Maximum Continuous Operating Voltage (RMS)
      — highest steady voltage the arrester tolerates forever.
      Must exceed system line-to-ground voltage, e.g. on a
      230 kV system:  V_LG = 230 / √3 = 132.8 kV  →  MCOV ≈ 144–180 kV

Ur    Rated voltage — withstands a 10 s temporary overvoltage (TOV).
      Roughly  Ur ≈ 1.25 × MCOV.

Vres  Residual (discharge) voltage — the clamp level while conducting
      a standard surge, quoted at 10 kA on an 8/20 µs impulse.
      For a station arrester:  Vres ≈ 2.5–3.3 × MCOV (≈ 2.0–2.6 × Ur).

BIL   Basic Insulation Level of the protected equipment — the impulse
      voltage its insulation must survive (1.2/50 µs).

Protective margin (must be positive, IEEE C62.22 wants ≥ 20%):

  PM = (BIL / Vres − 1) × 100%

The "8/20 µs" and "1.2/50 µs" notations are standardised waveshapes: the first number is the rise time to peak (front), the second is the time to decay to half-value (tail). The 8/20 µs current impulse models a direct lightning stroke; the 1.2/50 µs voltage impulse is the insulation test wave. An arrester's job is to keep Vres comfortably below BIL across every credible surge.

The energy-handling rating matters just as much as the voltage. A switching surge on a long line can deposit kilojoules into the discs over a few hundred microseconds; the disc temperature rises adiabatically because there's no time to shed heat:

Energy absorbed per surge:   W = ∫ V_res(t) · i(t) dt   [kJ]

Adiabatic temperature rise:  ΔT = W / (m · c_p)
  c_p(ZnO ceramic) ≈ 0.5 J/(g·K)

Line-discharge class arresters are rated in kJ/kV of Ur
(e.g. Class 3 ≈ 5.1 kJ/kV). Exceed the rating and the disc
cracks from thermal shock or tips into thermal runaway.

Worked example: arrester on a 230 kV substation transformer

Protect the high-voltage bushing of a 230 kV transformer whose insulation is rated at a 900 kV BIL. Walk the coordination:

System line-to-ground voltage:  V_LG = 230 / √3 = 132.8 kV RMS
Choose MCOV:                     152 kV   (≈ 1.14 × V_LG, headroom for TOV)
Rated voltage:                   Ur ≈ 1.25 × 152 = 190 kV

Residual voltage at 10 kA, 8/20 µs (from datasheet, ≈ 2.5 × Ur):
  Vres ≈ 2.5 × 190 ≈ 470 kV (crest)   (≈ 3.1 × MCOV)

Protective margin against the 900 kV BIL:
  PM = (900 / 470 − 1) × 100% = 91%   ✓  (well above the 20% floor)

So a lightning strike that would otherwise drive the bushing toward 900 kV and flash over its insulation is instead pinned at about 470 kV, with a 91% safety margin. Now check the current the disc actually carries. Suppose the strike injects a 10 kA, 8/20 µs surge. The disc clamps at ~470 kV crest, so the peak power dumped is:

P_peak = Vres × I_peak = 470 kV × 10 kA = 4.7 GW  (for ~8 µs)

Energy of the single 8/20 µs pulse ≈ ½ · Vres · I · t_eq
  ≈ 0.5 × 470 kV × 10 kA × 20 µs ≈ 47 kJ

Against a Class-3 rating of ~5 kJ/kV × 190 kV ≈ 950 kJ of capability,
one lightning pulse is a small fraction — the design is dominated
by switching surges and repeated strikes, not a single hit.

The lesson the numbers teach: a surge arrester briefly handles gigawatts and tens of kilojoules, yet at the same instant holds the voltage flat — and the day after, sitting at 132.8 kV line-to-ground, it leaks well under a milliamp and looks like it isn't there.

Construction and arrester classes

A high-voltage arrester is a stack of ZnO discs (each roughly 40 to 100 mm in diameter and 20 to 45 mm thick), clamped end-to-end under spring pressure inside a sealed, weatherproof housing. The number of discs in series sets the voltage rating; their diameter sets the current/energy capability. Two housing technologies dominate:

• Porcelain-housed. The classic glazed-porcelain shed insulator filled with a dry nitrogen or SF₆-free atmosphere. Robust and UV-proof, but heavy, and if it fails the porcelain can shatter explosively — which is why pressure-relief diaphragms are mandatory.
• Polymer-housed (silicone rubber over a fiberglass core). Lighter, hydrophobic (sheds water so the surface stays clean), and fails gracefully — it vents and splits rather than shattering. Now the default for new distribution and most transmission installs.

Arresters are graded by where they sit and how much energy they must absorb. The rough ladder, from lightest duty to heaviest:

Class (IEC 60099-4 / IEEE C62.11)	Typical use	Nominal discharge current	Energy capability
Secondary / low-voltage (service entrance)	120/240 V panels, meters	1.5–10 kA	Low (joules)
Distribution (normal / heavy duty)	Pole-top, padmount, 5–35 kV	5–10 kA	0.5–2.5 kJ/kV
Intermediate / riser pole	Cable terminations, 15–48 kV	10 kA	2.5–4 kJ/kV
Station class (LD class 1–3)	Substations, transformers, 72.5 kV+	10–20 kA	3.5–10 kJ/kV
EHV / line-discharge class 4–5	Long EHV/UHV lines, series caps	20 kA	≥ 10 kJ/kV

Surge arrester vs other protective devices

	MOV surge arrester	SiC + gap arrester (legacy)	Spark gap / GDT	TVS / Zener diode	Circuit breaker
Protects against	Overvoltage transients	Overvoltage transients	Overvoltage transients	Overvoltage transients	Overcurrent / faults
Response time	< 25 ns	µs (gap sparkover delay)	0.1–1 µs (sparkover)	< 1 ns	10–80 ms
Clamping behaviour	Soft clamp, flat V over wide I	Clamp after gap fires	Crowbar (collapses to arc V)	Sharp clamp, low energy	Opens the circuit
Self-recovers?	Yes, every cycle	Must extinguish power-follow	Power-follow risk, may not	Yes	No — must be reset
Energy capability	kJ to MJ (disc volume)	kJ	High (arc)	Low (mW–W avg)	Very high (kA fault)
Voltage range	Few V to 800+ kV	kV class	Few hundred V to kV	3–400 V typical	V to 1100 kV
Typical home	Grid, substations, mains SPDs	Old substations (retired)	Telecom, AC mains coarse stage	PCB / data-line protection	Every panel & feeder

The key distinction people get wrong: an arrester and a breaker are not alternatives. They protect against orthogonal hazards — voltage vs current — and a properly engineered system has both. The arrester clamps the nanosecond spike; the breaker clears the millisecond fault. Often the same lightning event triggers the arrester first and the breaker second.

Where surge arresters are used

• Transmission and distribution lines. Mounted at the line entrance to substations and at cable transition (riser) poles where an overhead line meets underground cable — the cable's insulation is far less self-healing than air, so it must be protected.
• Transformers. The single most-protected asset on the grid. An arrester sits right at the bushing because a transformer is expensive, slow to replace, and its layer insulation is unforgiving of overvoltage.
• Switchgear and GIS. Switching a circuit breaker or disconnector itself launches steep transients (and in gas-insulated switchgear, very-fast transients in the MHz range); arresters tame them.
• Generators and large motors. Surge arrester plus surge capacitor at the machine terminals slows the wavefront and clamps the peak so the stator winding insulation survives.
• HVDC converter stations. Dozens of arresters coordinate the insulation of valves, bushings, and DC buses, where converter switching produces its own surges.
• Service entrances and inside buildings. The same ZnO physics, scaled down: the surge protective device (SPD) in your panel and the MOV in a power strip are miniature arresters rated for hundreds of volts and a few kA.
• Railway catenary, wind turbines, PV arrays. Exposed, tall, and electrically remote — all prime lightning targets, all arrester-protected.

Failure modes, ageing, and pitfalls

• Thermal runaway. The defining failure. At MCOV the disc always leaks a small resistive current that heats it; the leakage current rises with temperature; if the heat input outruns the housing's ability to shed heat, the disc gets hotter, leaks more, and avalanches into a conductive short. Triggers: a sustained temporary overvoltage (TOV), too many surges in quick succession, or a too-low MCOV selection. The stability criterion is that the cooling curve must intersect the heating curve at a stable operating point — lose that intersection and runaway is inevitable.
• Moisture ingress. A failed seal lets humidity into the housing; moisture tracks across the disc surface, raises leakage, drives local heating, and eventually flashes over internally. Sealing integrity is the number-one quality differentiator between a 30-year arrester and a 5-year failure.
• Failure-to-ground and pressure relief. When a disc finally fails it becomes a short, and the system feeds full power-frequency fault current into it. Energy vaporises material and pressurises the housing; without a vent the porcelain shatters. Designs include a pressure-relief diaphragm to arc the fault externally and a disconnector that explosively drops the ground-side lead — both clearing the fault and giving a visible "this one's dead" flag for line crews.
• Ageing / degradation. Each surge nudges the V-I curve, slowly raising the leakage current at MCOV. Condition monitoring measures the resistive component of leakage current (the capacitive part is benign); a rising resistive leakage is the early-warning signal that a disc is degrading before it runs away.
• Wrong MCOV selection — both directions. Too low and the arrester overheats and ages fast in normal service. Too high and Vres climbs, the protective margin shrinks, and the equipment it's supposed to guard is left exposed. Coordination is a genuine optimisation, not "bigger is safer."
• Lead length and the inductive kick. The connecting leads have inductance (~1 µH/m). A fast surge (di/dt of kA/µs) develops V = L·di/dt across even a short lead — a 1 m lead at 10 kA/µs adds ~10 kV on top of Vres. Keep arrester leads as short and straight as physically possible; long droopy leads quietly defeat a good arrester.